"implementation of complex digital
designs on mixed signal IC’s, covering
all of the activities associated with
digital physical design such as
synthesis, layout, timing and power
analysis, DFT insertion, ATPG, CTS,
logical equivalence, LVS, DRC and
simulation."
"Familiar with Synopsys implementation
and verification tools, Verilog, perl,
TCL, shell scripts, Makefiles and
version control tools."
"experience of digital IC design using
HDL (e.g. Verilog) and logic Synthesis
preferably in a Cadence based EDA tools
environment; be familiar with the design
flow for FPGA targets and be comfortable
working at the bench to debug designs
using such instruments as oscilloscopes
and logic analysers"
"a
good working knowledge of BiCMOS or CMOS
technology; feedback control systems and
compensation techniques; integrated
pulse width modulated (PWM) power
controllers with an emphasis on buck,
boost, inverter or buck-boost
topologies; regulated or unregulated
charge pump circuits; battery management
or power control systems; high current,
rail to rail CMOS op-amps; familiarity
with Cadence design tools"
"experience
of high speed / high power analogue
design using IC and discrete
transistors; design of high speed,
moderate power, switch mode analogue
circuits; control theory/stability
analysis and compensation networks;
circuit simulation using time domain
simulation package e.g. SPICE / Spectre;
high speed PCB modelling experience,
including parasitic extraction and
transmission line effects; BJT and
MOSFET device characteristics and
circuit topologies; device speed
limitations, failure modes and breakdown
mechanisms; high power efficiency design
techniques including thermal analysis;
modern thermal packaging technology and
thermal relief techniques; design for
high reliability and design for
manufacture"
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